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https://github.com/sharebrained/robotron-fpga
http://www.hermannseib.com/english/synths/ppg/wavesim.htm
You could try speeding up the Matrix by running the clocks faster, but I don't think you would get usable results as the envelopes and LFOs are more than likely tightly coupled to the clock speed of the CPU.
This guy did manage to do something similar,
Though note the number and complexity of features wasn't incredible. I emailed the author Richard about this a while ago and is knowledgeable on 8 bit CPU synth hacking and could be a helpful resource on this path.
Hacking the firmware to add new features or replace buggy code would also be quite the difficult task. Someone would need a good chunk of time and be well versed in 6809 assembly. For anything beyond the academic nature of such a project, my opinion is re-using the binary firmware isn't a good option now that fast, cheap, flash able embedded systems are available, which brings me to...
2) Re-write the firmare from scratch for a different arch
This has been done before as well for other synths
http://gligli.github.io/p600fw/
The latter project could be helpful since it's open source and for a synth of similar architecture. Not the same CPU but they're both 8 bit CPUs controlling DACs for CV. Some code could probably even be shared, like LFO and envelopes.
I'm currently working on porting the p600fw project to the SC Max/6trak line of synths. Much easier project since the 6 trak is basically a p600 with 1 less osc per voice. It has an added sequencer but I wouldn't even care about replicating that since I haven't even used it myself. It would gain the ARP from the p600fw though!