> -----Ursprüngliche Nachricht-----
> Von:
Doepfer_a100@yahoogroups.com
> [mailto:
Doepfer_a100@yahoogroups.com
]Im Auftrag von Florian Anwander
> Gesendet: Mittwoch, 29. Oktober 2008 10:57
> An:
Doepfer_a100@yahoogroups.com
> Betreff: Re: 1 Re: Gates
>
>
> madrayken schrieb:
> > Of course, you're correct. I'm using the self-triggering Quad ADSR,
> > so I can send the D-Gate out to a multiple and send one back to the
> > ADSR and the other to the S&H. My interest is purely academic: how is
> > my ADSR peak different from an LFO I use the two interchangeably in
> > all other cases.
> > LFOs go from -2.5 to +2.5v.
> > Envelope gates are at +10v.
> >
> > Both these work to trigger the S&H.
> >
> > Envelopes themselves go from 0v to +8v, yet these never trigger
> > gates.
> >
> > Specifically: having read the manuals, I can't see anywhere where a
> > gate is considered to be a shift from +ve to -ve voltage, but this
> > would appear to be the case. Am I right
>
> Ok, this becomes understandable. But I have no dedicated answer for you.
>
> The only thing I could imagine is, that the trigger threshold for the
> S&H is quite low (lets say at 0.5 Volts) and the Quad ADSR assumingly
> does not return completely to 0 Volts when in self-triggering mode. (I
> know this from other makers envelopes, e.g the ADSR of my Formant does
> not go down to 0 V completely. You have to work with an negative offset
> at the VCA to make it silent).
>
> Florian
To obtain a correct function only "digital" signals (i.e. gate, clock or
rectangle LFO signals) should be used as gate sources. But in a modular
system even analog signals (envelopes, non-rectangle LFOs, random signals,
audio signals ...) may be (ab-)used as gate sources. In these cases the
correct gate function cannot be guaranteed because all depends upon the
circuit that is used in the gate input section. For some gate inputs only a
certain level has to be reached to trigger the corresponding function (e.g.
A-148 in T&H mode, A-112 sampling module gate, A-140 ADSR gate). But for
other gate inputs even the rise time is essential (e.g. A-148 in S&H mode,
A-143-2 ADSR gate) because a capacitor is used to generated an internal
trigger signal (kind of AC coupling). The rise time of a "digital" signal
(e.g. clock, rectangle LFO) is always sufficient. But if an analog control
signal is used and the rise time may be not sufficient and the circuit will
not trigger. You may find out that an ADSR can be used for some of these
gate applications if the attack time is short enough but the gate function
will no longer work if the attack time goes beyond a certain value (there
may be even an intermediate state where the functions works randomly now
and then).
Hope this helps
Dieter Doepfer